The present disclosure generally relates to memory for a computer processing system and, more particularly, relates to a built-in self-test (BIST) for embedded spin-transfer torque magnetic random access memory (STT-MRAM).
Spin-transfer torque magnetic random access memory has emerged as a leading candidate for next-generation memory for L2/L3 cache and DRAM replacement. Due to its great scalability, rapid access speed, low power consumption and non-volatility, it has attracted increasing attention in the semiconductor industry. Like all semiconductor products, STT-MRAM chips need to undergo intensive electrical tests to identify and eliminate defective chips and provide improved outgoing product quality to customers. Whereas testing conventional memories is a mature field, little is known about testing STT-MRAMs. Having a sound test approach for STT-MRAMs is useful for industrial adoption.